| 摘要: |
| 针对传统工业图像实时压缩采集系统中图像数据传输较慢、信号干扰大、压缩不稳定等问题，提出了一种优化设计方案。该设计以FPGA为主控单元，采用标准压缩芯片ADV212进行图像实时压缩处理，并对LVDS传输图像数据的方法进行优化，由传统的外部串化芯片MAX9247和解码芯片MAX9250改为FPGA内部原语OSERDES2和ISERDES2实现数据的串化和解串。实验结果表明，并行数据的传输速率由原来的35MHz提升到50MHz，大幅提升了数据传输的速率，在同样的压缩倍数下，得到了更为清晰稳定的压缩图像。 |
| 关键词: 系统优化 图像压缩 SERDES2 FPGA LVDS |
| DOI： |
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| 基金项目:国家自然科学基金杰出青年基金 |
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| An Optimization Design of Real-time Image Compression System for Industry |
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| Abstract: |
| In order to solve the problems of the traditional industrial image real-time compression acquisition system, such as slowly data transmission, large signal interference, and compression instability, one optimal design scheme was put forward. The design is based on FPGA as main logic control, the standard compression chip ADV212 is used for real-time image compression processing. And the method of LVDS transmission image data is optimized. The traditional external serialized chip MAX9247 and the decoding chip MAX9250 were changed to FPGA internal primitive OSERDES2 and ISERDES2 to realize the serialization and reconciliation of data. The experimental results show that the parallel data transmission rate from 35 MHZ up to 50 MHZ, significantly enhance the data transmission rate, at the same compression ratio, get the more stable and clearly compressed images. |
| Key words: System optimization Image compression SERDES2 FPGA LVDS |