| 摘要: |
| 本文从设计符合EPCTM C1G2协议的超高频无源射频识别标签芯片的角度出发，对RFID标签芯片模拟前端电路进行设计。通过对各个关键电路的功耗与电源进行优化，实现了一个符合协议要求的低电压、低功耗的超高频无源RFID标签芯片的模拟前端。该UHF RFID标签模拟前端设计采用SMIC 0.18um EEPROM CMOS工艺库。仿真结果表明，标签芯片模拟前端的整体功耗控制在2.5uW以下，工作电源可低至1V，更好地满足了超高频无源射频识别标签芯片应用需求。 |
| 关键词: 超高频（UHF） 射频识别（RFID） 低电压 低功耗 |
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| Design of Low-voltage and Low-power Analog Front For UHF Passive RFID Tag |
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| Abstract: |
| This paper focuses mainly on designing analog front of a low-voltage and low-power rfid tag according to demand of EPCTM C1G2. By designing and optimizing several key circuits of analog front of rfid tag, low-voltage and low-power analog front of passive uhf rfid tag is achieved. All circuits are designed in Cadence software using SMIC 0.18um EEPROM CMOS technology kit. The whole analog front of rfid tag consumes below 2.5uW and work voltage is 1V, which satisfies application of passive uhf rfid tag better. |
| Key words: ultra high frequency (UHF) Radio Frequency Identification (RFID) low voltage low power |