| 摘要: |
| 时间间隔测量技术在原子物理、激光测距、定位定时等方面有着重要的应用，因此，高精度的时间数字转换电路(Time-to-Digital Converter，TDC)在科学研究和工程实践中扮演着重要的角色；但是TDC在进行时间间隔测量量化时往往受到亚稳态制约，影响了TDC的分辨率、线性度，甚至会出现错误的输出结果。本文通过加入相位判断逻辑，可以完全消除TDC量化时间间隔时遇到的亚稳态问题。本文提出的TDC设计方案，工作频率512MHz，测量精度250ps，测量范围1μs，功耗400μW。 |
| 关键词: 时间间隔测量，时间数字转换电路，亚稳态消除 |
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| A Design Scheme of TDC with Metastability-Elimination Circuits |
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| Abstract: |
| The technology of time interval measurement is of great importance role in the atoic physics,laser ranging,positioning and timing,and so on;As a result,the high precision Time-to-Digital Converter plays an important role in the scientific research and engineering practice.However, time interval measurement of TDC is often subject to metastability,which affects the resolution and linearity of TDC,and maybe worse,the result of time interval measurement is wrong.In this paper,we can completely eliminate the metastability when TDC time interval by adding a phase judgment logic circuit. The design scheme of TDC presented in this paper works on 512MHz,and it’s measurement resolution is 250ps，range of measurement is 1μs，power is 400μW. |
| Key words: time interval measurement, Time-to-Digital Converter, metastability elimination |